Firmware builder development

Hi Clemens!

You are welcome, thanks for your acknowledgement!

Thanks for asking! While developing this subsystem the other day, we wrote down some words about the general concept and how it is designed, please find them here:

However, there is currently no other kind of documentation yet which a) describes the single parameters in more detail or b) offers something in the style of a step-by-step tutorial. Go figure… :-)

Seriously, we were hoping to get this going as a collaborative effort between some of us who are interested in this topic over the course of the next days or weeks. Please don’t hesitate to share your thoughts, we would appreciate your help because it is important to us to make everyone feel comfortable with this feature. Feel free to ask any questions to bootstrap this process eventually, we will be happy to answer!

It will definitively be very cool to just head to a beautifully designed user interface, check some features, press the button and off you go! However, designing and building something like that requires a significant amount of effort to be put into.

That’s why we are announcing the infrastructural “Beta”: We want to encourage all of you to use what we already have to gain some experience and receive valuable feedback about how to iterate and improve on top of this. Especially after we now have tapped into building for the Espressif architecture as a second target after the AVR architecture and mitigated some other issues in the second iteration on the infrastructure machinery under the hood, we consider the subsystem to be almost ready for general consumption. As we have been able to successfully compile all of our representative firmwares listed above, we are confident everything works as designed in general.

There will definitively be quirks: Finding and mitigating them is what we are aiming at right now with this call to you.

Feel free to ask us anything, we are happy to answer.